Silicon Validation Engineer
MatX
<p><strong>What MatX Is Building</strong></p> <p>MatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies.</p> <p><strong>What You'll Do Here</strong></p> <ul> <li>Own silicon bring-up and validation from first power-on through feature validation and production readiness.</li> <li>Develop and execute validation plans for chip-level and SiP-level functionality, performance, reliability, and system&nbsp;behavior.</li> <li>Validate boot, reset, initialization, power management, recovery, memory, interconnect, high-speed interfaces, and&nbsp;package-level functionality.</li> <li>Work across Top-level DV, Palladium emulation, lab validation, and package validation to improve coverage and&nbsp;correlation between environments.</li> <li>Debug complex failures using logs, registers, traces, waveforms, firmware output, and lab equipment.</li> <li>Analyze issues across RTL, firmware, software, board, package, and silicon boundaries.</li> <li>Collaborate with architecture, design, DV, emulation, firmware, software, and product engineering teams.</li> <li>Define observability and debug requirements and improve validation automation, execution, and failure triage.</li> </ul> <p><strong>Who You Are</strong></p> <ul> <li>Strong hands-on experience in silicon validation, post-silicon bring-up, hardware emulation, Top-level DV, or a related&nbsp;field.</li> <li>Experience validating complex SoCs, accelerators, or highly integrated silicon products.</li> <li>Strong understanding of digital hardware, SoC architecture, and hardware-firmware interaction.</li> <li>Proven ability to debug complex cross-functional failures and drive them to root cause.</li> <li>Experience working with real silicon and lab platforms.</li> <li>Familiarity with firmware, embedded software, drivers, and low-level hardware access.</li> <li>Ability to read and understand C or C++ code for debug purposes.</li> <li>Python or similar scripting experience.</li> <li>Ability to read specifications, register descriptions, validation plans, and relevant RTL.</li> <li>Strong ownership, communication, and cross-functional collaboration skills.</li> </ul> <p><strong>Bonus Points If You Have</strong></p> <ul> <li>Experience with both pre-silicon and post-silicon validation.</li> <li>Experience with Cadence Palladium.</li> <li>Experience with SystemVerilog, UVM, assertions, coverage, or waveform debug.</li> <li>Experience bringing up first silicon.</li> <li>Experience with HBM, DDR, PCIe, CXL, Ethernet, die-to-die interfaces, or advanced packaging.</li> <li>Familiarity with JTAG, oscilloscopes, logic analyzers, or protocol analyzers.</li> </ul> <p><strong>Compensation</strong></p> <p>The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.</p> <ul> <li>Early Career - $120,000 - $2